1.
The data bus width of 8051 is,
Correct Answer
B. 8 bit
Explanation
The correct answer is 8 bit because the 8051 microcontroller has an 8-bit data bus. This means that it can transfer 8 bits of data at a time between the microcontroller and other devices. The 8-bit data bus width allows for efficient and compact data transfer, making it suitable for many embedded systems applications.
2.
No. of address lines in 8051 architecture is..
Correct Answer
B. 16 bits
Explanation
The 8051 architecture has 16 address lines. This means that it can address up to 2^16 = 65536 unique memory locations. The 16-bit address lines allow the microcontroller to access a large amount of memory, making it suitable for a wide range of applications.
3.
Total no. of addressing modes supported by 8051 is
Correct Answer
C. 6
Explanation
The 8051 microcontroller supports 6 addressing modes. These addressing modes are used to specify the location of data or operands in memory or registers. The different addressing modes supported by the 8051 are immediate addressing, direct addressing, indirect addressing, register addressing, indexed addressing, and relative addressing. Each addressing mode has its own advantages and is used in different situations based on the requirements of the program.
4.
MOV A,@R0
Identify the addressing mode
Correct Answer
B. Register indirect addressing mode
Explanation
The instruction MOV A,@R0 indicates that the value of the accumulator (A) is being moved to the memory location pointed to by the register R0. This is an example of register indirect addressing mode, where the address of the operand is stored in a register. In this case, the register R0 is used to indirectly access the memory location where the value of A is being stored.
5.
In 8051 memmory organization, the bit addressable area is,
Correct Answer
C. 20 - 2FH
Explanation
The bit addressable area in 8051 memory organization is from address 20H to 2FH. This means that the bits within this range can be individually accessed and manipulated.
6.
MOV DPTR,#4500H
MOVX A,@DPTR
INC DpH
MOVX @DPTR,A
What does the above program perform?
Correct Answer
B. Copies the content of memmory location 4500H to 4600H
Explanation
The given program performs the task of copying the content of memory location 4500H to memory location 4600H. This is achieved by first loading the address of 4500H into the DPTR register using the MOV instruction. Then, the MOVX instruction is used to move the content of the memory location pointed by DPTR (4500H) into the accumulator register A. Next, the DPH register is incremented to point to the next memory location (4501H). Finally, the MOVX instruction is used again to move the content of the accumulator A into the memory location pointed by DPTR (4600H).
7.
2's complement of the number 10H
Correct Answer
C. F0H
Explanation
The 2's complement of a number is obtained by taking the 1's complement (flipping all the bits) and then adding 1 to the result. In this case, the number is 10H, which is 00010000 in binary. Taking the 1's complement gives 11101111, and adding 1 gives 11110000, which is F0H in hexadecimal. Therefore, the correct answer is F0H.
8.
Maximum size of extrenal ROM that can be addressed by 8051
Correct Answer
C. 64KB
Explanation
The maximum size of external ROM that can be addressed by the 8051 microcontroller is 64KB. This means that the microcontroller can access and retrieve data from a ROM chip with a maximum capacity of 64KB. Any ROM chip with a larger capacity would not be fully addressable by the 8051 microcontroller.
9.
8253 is
Correct Answer
A. Programmable timer
Explanation
8253 is a programmable timer.
10.
Total no. of timers in 8051
Correct Answer
B. 2
Explanation
The correct answer is 2 because the 8051 microcontroller has two timers, Timer 0 and Timer 1. These timers are used for various timing and counting operations in the microcontroller. They can be programmed to generate interrupts, measure time intervals, and control the timing of various tasks in a system. Having multiple timers allows for more flexibility and precision in timing operations.
11.
SFR address range in 8051
Correct Answer
C. 80 - FFH
Explanation
The SFR address range in the 8051 microcontroller is from 80H to FFH. SFR stands for Special Function Register, which are memory locations used to control and monitor various hardware functions of the microcontroller. The range from 80H to FFH is reserved for these special function registers.
12.
What does the following instruction perform?
CPL A
Correct Answer
B. Complement Accumulator
Explanation
The instruction "CPL A" performs the operation of complementing the value in the Accumulator register. This means that all bits in the Accumulator are inverted, so if a bit was originally 0, it becomes 1, and if it was originally 1, it becomes 0. This operation does not involve any comparison with other registers or nibbles.
13.
After initialisation the value in Stack Pointer registre is
Correct Answer
C. 07H
Explanation
The correct answer is 07H because the value in the Stack Pointer register is determined by the initialisation process. In this case, after initialisation, the value in the Stack Pointer register is 07H.
14.
Total no. of interrupt sources in 8051 including RESET is,
Correct Answer
C. 6
Explanation
The 8051 microcontroller has a total of 6 interrupt sources, including the RESET interrupt. Interrupts are signals that can interrupt the normal program flow and allow the microcontroller to respond to external events. These interrupt sources can be used for various purposes such as timer overflow, external hardware interrupts, and serial communication interrupts. The RESET interrupt is a special type of interrupt that is triggered when the microcontroller is reset. Therefore, the correct answer is 6.
15.
Which of the following is the highest priority interrupt in 8051
Correct Answer
A. EXTERNAL INT0(IE0)
Explanation
The highest priority interrupt in the 8051 microcontroller is the EXTERNAL INT0(IE0) interrupt. This interrupt is triggered by an external signal on the INT0 pin and has the highest priority among all the interrupts in the 8051. When this interrupt occurs, the microcontroller stops the current execution and jumps to the interrupt service routine associated with the EXTERNAL INT0 interrupt. This interrupt is commonly used for critical events that require immediate attention, such as external hardware events or real-time input signals.
16.
Total no. of PINs and supply voltage of 8051
Correct Answer
A. 40 pins and 5V
Explanation
The correct answer is 40 pins and 5V. The 8051 microcontroller has a total of 40 pins, which are used for various purposes such as input/output, power supply, communication, and control signals. Additionally, the supply voltage for the 8051 microcontroller is typically 5V, which is the voltage required for its proper operation.
17.
Parity flag in 8051 is set when,
Correct Answer
A. No. of 1s in Accumulator is odd
Explanation
The parity flag in the 8051 microcontroller is set when the number of 1s in the accumulator is odd. This means that if there are an odd number of 1s in the accumulator, the parity flag will be set to indicate this. Conversely, if there are an even number of 1s in the accumulator, the parity flag will not be set. The parity flag is used to perform parity checks, which are used to detect errors in data transmission.
18.
Total No. of Bits in PSW register is ,
Correct Answer
B. 8
Explanation
The correct answer is 8 because the PSW (Program Status Word) register is typically used to store the status of the processor. In most architectures, it consists of 8 bits which represent various flags such as carry, zero, overflow, etc. These flags are used to indicate the outcome of arithmetic and logical operations performed by the processor. Therefore, the total number of bits in the PSW register is 8.
19.
Which of the following registers is used for external data memmory access?
Correct Answer
B. DPTR
Explanation
The DPTR register is used for external data memory access. DPTR stands for Data Pointer and it is a 16-bit register in the 8051 microcontroller. It is used to store the address of the data in the external memory that needs to be accessed. By using the DPTR register, the microcontroller can read or write data from or to the external memory. The other registers mentioned in the options (PCON, PSW, TCON) are not specifically used for external data memory access.
20.
Identify the addressing mode in the following instruction
MOV A,40H
Correct Answer
A. Direct addressing mode
Explanation
The instruction "MOV A,40H" is using direct addressing mode. In direct addressing mode, the operand (40H in this case) directly specifies the memory location where the data is stored or retrieved. The value 40H is directly moved into the accumulator register A.
21.
Which of the following peripherals is used to control the flow of interrupts,
Correct Answer
B. 8259
Explanation
The 8259 peripheral is used to control the flow of interrupts. It is an interrupt controller chip that manages multiple interrupt sources and prioritizes them. It can handle both maskable and non-maskable interrupts and allows the CPU to respond to them in a controlled manner. The 8259 helps in coordinating the timing and order of interrupt requests, ensuring that the CPU can effectively handle various interrupt signals from different devices.
22.
No. of address lines in 8051 architecture is..
Correct Answer
B. 16 bits
Explanation
The 8051 architecture has 16 address lines. The address lines determine the range of memory that can be accessed by the microcontroller. With 16 address lines, the 8051 can access a maximum of 64KB of memory. This allows for a large amount of data and instructions to be stored and accessed by the microcontroller, making it suitable for a wide range of applications.
23.
No. of address lines in 8051 architecture is..
Correct Answer
B. 16 bits
Explanation
The 8051 architecture has 16 address lines. Address lines are used to specify the location of data in memory. Having 16 address lines means that the 8051 can access up to 2^16 or 64KB of memory. This allows for a larger addressable memory space, which is important for handling complex programs and large amounts of data.